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Microchip Technology /ATSAMD21J17A /USB /HOST /CTRLB

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Interpret as CTRLB

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RESUME)RESUME 0 (NORMAL)SPDCONF 0 (TSTJ)TSTJ 0 (TSTK)TSTK 0 (SOFE)SOFE 0 (BUSRESET)BUSRESET 0 (VBUSOK)VBUSOK 0 (L1RESUME)L1RESUME

SPDCONF=NORMAL

Description

HOST Control B

Fields

RESUME

Send USB Resume
SPDCONF

Speed Configuration for Host

0 (NORMAL): Normal mode:the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable.

3 (FS): Full-speed:the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only.
TSTJ

Test mode J
TSTK

Test mode K
SOFE

Start of Frame Generation Enable
BUSRESET

Send USB Reset
VBUSOK

VBUS is OK
L1RESUME

Send L1 Resume

Links

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Register License

Copyright © 2018 Microchip Technology Inc.

SPDX-License-Identifier: Apache-2.0

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data